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» Comparison of Hardware and Software Cache Coherence Schemes
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CODES
2011
IEEE
12 years 7 months ago
Dynamic, multi-core cache coherence architecture for power-sensitive mobile processors
Today, mobile smartphones are expected to be able to run the same complex, memory-intensive applications that were originally designed and coded for general-purpose processors. Ho...
Garo Bournoutian, Alex Orailoglu
DATE
2004
IEEE
173views Hardware» more  DATE 2004»
13 years 11 months ago
Supporting Cache Coherence in Heterogeneous Multiprocessor Systems
In embedded system-on-a-chip (SoC) applications, the need for integrating heterogeneous processors in a single chip is increasing. An important issue in integrating heterogeneous ...
Taeweon Suh, Douglas M. Blough, Hsien-Hsin S. Lee
DSD
2008
IEEE
147views Hardware» more  DSD 2008»
13 years 9 months ago
A Low-Cost Cache Coherence Verification Method for Snooping Systems
Due to modern technology trends such as decreasing feature sizes and lower voltage levels, fault tolerance is becoming increasingly important in computing systems. Shared memory i...
Demid Borodin, Ben H. H. Juurlink
ASPLOS
2011
ACM
12 years 11 months ago
Hardware acceleration of transactional memory on commodity systems
The adoption of transactional memory is hindered by the high overhead of software transactional memory and the intrusive design changes required by previously proposed TM hardware...
Jared Casper, Tayo Oguntebi, Sungpack Hong, Nathan...
ICON
2007
IEEE
14 years 1 months ago
Using a Cache Scheme to Detect Misbehaving Nodes in Mobile Ad-Hoc Networks
-- This paper presents a hardware based cache scheme to detect misbehaving nodes in mobile ad hoc network. In this scheme, the hardware monitors the activities of the upper-layer s...
Hongxun Liu, José G. Delgado-Frias, Sirisha...