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» Compilation Techniques for Out-of-Core Parallel Computations
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PPOPP
2003
ACM
14 years 1 months ago
Compiler support for speculative multithreading architecture with probabilistic points-to analysis
Speculative multithreading (SpMT) architecture can exploit thread-level parallelism that cannot be identified statically. Speedup can be obtained by speculatively executing threa...
Peng-Sheng Chen, Ming-Yu Hung, Yuan-Shin Hwang, Ro...
IPPS
2005
IEEE
14 years 2 months ago
A Compiler-Enabled Model- and Measurement-Driven Adaptation Environment for Dependability and Performance
Traditional techniques for building dependable, highperformance distributed systems are too expensive for most non-critical systems, often causing dependability to be sidelined as...
Vikram S. Adve, Adnan Agbaria, Matti A. Hiltunen, ...
EUROPAR
2000
Springer
14 years 7 days ago
Cache Remapping to Improve the Performance of Tiled Algorithms
With the increasing processing power, the latency of the memory hierarchy becomes the stumbling block of many modern computer architectures. In order to speed-up the calculations, ...
Kristof Beyls, Erik H. D'Hollander
FCCM
2002
IEEE
321views VLSI» more  FCCM 2002»
14 years 1 months ago
Queue Machines: Hardware Compilation in Hardware
Abstract - In this paper, we hypothesize that reconfigurable computing is not more widely used because of the logistical difficulties caused by the close coupling of applications a...
Herman Schmit, Benjamin A. Levine, Benjamin Ylvisa...
MICRO
1998
IEEE
79views Hardware» more  MICRO 1998»
14 years 27 days ago
Widening Resources: A Cost-effective Technique for Aggressive ILP Architectures
The inherent instruction-level parallelism (ILP) of current applications (specially those based on floating point computations) has driven hardware designers and compilers writers...
David López, Josep Llosa, Mateo Valero, Edu...