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» Compilation Techniques for Out-of-Core Parallel Computations
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IEEEPACT
2009
IEEE
14 years 3 months ago
Chainsaw: Using Binary Matching for Relative Instruction Mix Comparison
With advances in hardware, instruction set architectures are undergoing continual evolution. As a result, compilers are under constant pressure to adapt and take full advantage of...
Tipp Moseley, Dirk Grunwald, Ramesh Peri
IEEEPACT
2005
IEEE
14 years 2 months ago
Design and Implementation of a Compiler Framework for Helper Threading on Multi-core Processors
Helper threading is a technique that utilizes a second core or logical processor in a multi-threaded system to improve the performance of the main thread. A helper thread executes...
Yonghong Song, Spiros Kalogeropulos, Partha Tiruma...
ISHPC
1997
Springer
14 years 23 days ago
Implementing Iterative Solvers for Irregular Sparse Matrix Problems in High Performance Fortran
Abstract. Writing e cient iterative solvers for irregular, sparse matrices in HPF is hard. The locality in the computations is unclear, and for e ciency we use storage schemes that...
Eric de Sturler, Damian Loher
IPPS
1999
IEEE
14 years 27 days ago
DEFACTO: A Design Environment for Adaptive Computing Technology
The lack of high-level design tools hampers the widespread adoption of adaptive computing systems. Application developers have to master a wide range of functions, from the high-le...
Kiran Bondalapati, Pedro C. Diniz, Phillip Duncan,...
EUROPAR
1999
Springer
14 years 27 days ago
I/O-Conscious Tiling for Disk-Resident Data Sets
This paper describes a tiling technique that can be used by application programmers and optimizing compilers to obtain I/O-efficient versions of regular scientific loop nests. Du...
Mahmut T. Kandemir, Alok N. Choudhary, J. Ramanuja...