387 search results - page 18 / 78 » Compilation of Specifications |
FPL
2000
Springer
13 years 11 months ago
2000
Springer
Abstract. This work discusses the Memory Architecture for Reconfigurable Computers (MARC), a scalable, device-independent memory interface that supports both irregular (via configu...
JAIR
2000
13 years 7 months ago
2000
The recent approaches of extending the GRAPHPLAN algorithm to handle more expressive planning formalisms raise the question of what the formal meaning of "expressive power&qu...
ICFP
2009
ACM
14 years 8 months ago
2009
ACM
We define logical relations between the denotational semantics of a simply typed functional language with recursion and the operational behaviour of low-level programs in a varian...
DAC
1996
ACM
13 years 11 months ago
1996
ACM
The advent of parallel executing Address Calculation Units (ACUs) in Digital Signal Processor (DSP) and Application Specific InstructionSet Processor (ASIP) architectures has made...
SIGPLAN
2008
13 years 7 months ago
2008
Multi-core technology is being employed in most recent high-performance architectures. Such architectures need specifically designed multi-threaded software to exploit all the pot...