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» Compiled-code-based simulation with timing verification
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WSC
2008
13 years 10 months ago
Simulation-based verification of lean improvement for emergency room process
One of the key challenges to health care access in Canadian hospitals is growing overcrowding of the Emergency Departments (EDs), leading to the medical personnel overload, and th...
Nancy Khurma, Gheorghe M. Bacioiu, Zbigniew J. Pas...
ICSE
2008
IEEE-ACM
14 years 8 months ago
Temporal dependency based checkpoint selection for dynamic verification of fixed-time constraints in grid workflow systems
In grid workflow systems, temporal correctness is critical to assure the timely completion of grid workflow execution. To monitor and control the temporal correctness, fixed-time ...
Jinjun Chen, Yun Yang
CODES
2008
IEEE
13 years 9 months ago
Model checking SystemC designs using timed automata
SystemC is widely used for modeling and simulation in hardware/software co-design. Due to the lack of a complete formal semantics, it is not possible to verify SystemC designs. In...
Paula Herber, Joachim Fellmuth, Sabine Glesner
DSD
2005
IEEE
116views Hardware» more  DSD 2005»
14 years 1 months ago
Validation of Embedded Systems Using Formal Method Aided Simulation
This paper proposes a validation approach, based on simulation, which addresses problems related to both state space explosion of formal methods and low coverage of informal metho...
Daniel Karlsson, Petru Eles, Zebo Peng
DAC
2007
ACM
14 years 8 months ago
Automatic Verification of External Interrupt Behaviors for Microprocessor Design
Interrupt behaviors, especially the external ones, are difficult to verify in a microprocessor design project in that they involve both interacting hardware and software. This pap...
Fu-Ching Yang, Wen-Kai Huang, Ing-Jer Huang