1008 search results - page 10 / 202 » Compiler Technology for Two Novel Computer Architectures |
DAC
2011
ACM
12 years 7 months ago
2011
ACM
We present a high-level synthesis technique that takes as input two orthogonal descriptions: (a) a behavioral architectural contract between the implementation and the user, and (...
ICPP
2008
IEEE
14 years 1 months ago
2008
IEEE
The slow speed of conventional execution-driven architecture simulators is a serious impediment to obtaining desirable research productivity. This paper proposes and evaluates a f...
EUROMICRO
1997
IEEE
13 years 11 months ago
1997
IEEE
This paper considers whether the seemingly disparate fields of Computational Intelligence (CI) and computer architecture can profit from each others’ principles, results and e...
AP2PS
2009
IEEE
14 years 2 months ago
2009
IEEE
Abstract—This paper proposes a peer-to-peer video streaming delivery system within the framework of Next Generation Networks using Application Level Multicast. Increased efficie...
EUROPAR
1999
Springer
13 years 11 months ago
1999
Springer
Abstract. The High Performance Fortran (HPF) benchmark suite HPFBench was designed for evaluating the HPF language and compilers on scalable architectures. The functionality of the...