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» Compiler Technology for Two Novel Computer Architectures
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ISCAS
2003
IEEE
79views Hardware» more  ISCAS 2003»
14 years 3 months ago
Computation reduction in cascaded DCT-domain video downscaling transcoding
In this paper, we propose efficient techniques and architectures for realizing spatial-downscaling transcoders in the DCT domain. We also present methods for re-sampling motion ve...
Yuh-Ruey Lee, Chia-Wen Lin, Yen-Wen Chen
HPCC
2009
Springer
14 years 2 months ago
A Streaming Intrusion Detection System for Grid Computing Environments
Abstract—In this paper, a novel architecture for a streaming intrusion detection system for Grid computing environments is presented. Detection mechanisms based on traditional lo...
Matthew Smith, Fabian Schwarzer, Marian Harbach, T...
DAC
1992
ACM
14 years 1 months ago
Synthesis from Production-Based Specifications
This paper describes a model for, and an implementation of, production-based synthesis of hardware description language (HDL) code in which the overall structure of the resultant ...
Andrew Seawright, Forrest Brewer
WWW
2011
ACM
13 years 4 months ago
Towards liquid service oriented architectures
The advent of Cloud computing platforms, and the growing pervasiveness of Multicore processor architectures have revealed the inadequateness of traditional programming models base...
Daniele Bonetta, Cesare Pautasso
ASPLOS
2011
ACM
13 years 1 months ago
RCDC: a relaxed consistency deterministic computer
Providing deterministic execution significantly simplifies the debugging, testing, replication, and deployment of multithreaded programs. Recent work has developed deterministic...
Joseph Devietti, Jacob Nelson, Tom Bergan, Luis Ce...