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» Compiling Smalltalk-80 to a RISC
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JSA
2006
131views more  JSA 2006»
13 years 7 months ago
Bidirectional liveness analysis, or how less than half of the Alpha's registers are used
Interprocedural data flow analyses of executable programs suffer from the conservative assumptions that need to be made because no precise control flow graph is available and beca...
Bjorn De Sutter, Bruno De Bus, Koen De Bosschere
MICRO
1998
IEEE
111views Hardware» more  MICRO 1998»
13 years 11 months ago
Precise Register Allocation for Irregular Architectures
This paper proposes a precise approach to register allocation for irregular-register architectures which is based on 0-1 integer programming (IP). Prior work shows that IP registe...
Timothy Kong, Kent D. Wilken
CF
2004
ACM
14 years 15 days ago
Combining compiler and runtime IPC predictions to reduce energy in next generation architectures
Next generation architectures will require innovative solutions to reduce energy consumption. One of the trends we expect is more extensive utilization of compiler information dir...
Saurabh Chheda, Osman S. Unsal, Israel Koren, C. M...
CODES
2005
IEEE
14 years 21 days ago
Enhanced code density of embedded CISC processors with echo technology
Code density is an important issue in memory constrained systems. Some RISC processor, e.g. the THUMB extension in the ARM processor, supports aggressive code size reduction even ...
Youfeng Wu, Mauricio Breternitz Jr., Herbert H. J....
EUROPAR
2004
Springer
14 years 14 days ago
Architecture-Independent Meta-optimization by Aggressive Tail Splitting
Several optimization techniques are hindered by uncertainties about the control flow in a program, which can generally not be determined by static methods at compile time. We pres...
Michael Rock, Andreas Koch