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ASAP
2006
IEEE
108views Hardware» more  ASAP 2006»
15 years 7 months ago
New Schemes in Clustered VLIW Processors Applied to Turbo Decoding
State-of-the-art communication standards make extensive use of Turbo codes. The complex and power consuming designs that currently implement the turbo decoder expose the need for ...
Pablo Ituero, Marisa López-Vallejo
141
Voted
DAC
1989
ACM
15 years 7 months ago
An Efficient Finite Element Method for Submicron IC Capacitance Extraction
We present an accurate and efficient method for extraction of parasitic capacitances in submicron integrated circuits. The method uses a 3-D finite element model in which the cond...
N. P. van der Meijs, Arjan J. van Genderen
CC
2009
Springer
15 years 8 months ago
Scheduling Tasks to Maximize Usage of Aggregate Variables in Place
Single-assignment languages with copy semantics have a very simple and approachable programming model. A na¨ıve implementation of the copy semantics that copies the result of eve...
Samah Abu-Mahmeed, Cheryl McCosh, Zoran Budimlic, ...
DAC
2007
ACM
16 years 4 months ago
A Self-Tuning Configurable Cache
The memory hierarchy of a system can consume up to 50% of microprocessor system power. Previous work has shown that tuning a configurable cache to a particular application can red...
Ann Gordon-Ross, Frank Vahid
VLSID
2009
IEEE
170views VLSI» more  VLSID 2009»
16 years 4 months ago
Code Transformations for TLB Power Reduction
The Translation Look-aside Buffer (TLB) is a very important part in the hardware support for virtual memory management implementation of high performance embedded systems. The TLB...
Reiley Jeyapaul, Sandeep Marathe, Aviral Shrivasta...