1198 search results - page 19 / 240 » Compiling for EDGE Architectures |
CGO
2003
IEEE
14 years 2 months ago
2003
IEEE
To meet the performance demands of modern architectures, compilers incorporate an everincreasing number of aggressive code transformations. Since most of these transformations are...
CODES
1999
IEEE
14 years 1 months ago
1999
IEEE
In this paper, we develop a formal framework to widen the scope of retargetable compilation. The goal is achieved by the unification of architectural models for both the processor...
ICIP
2007
IEEE
2007
IEEE
Analysis and Integrated Architecture Design for Overlap Smooth and in-Loop Deblocking Filter in VC-1
14 years 10 months ago
Unlike familiar macroblock-based in-loop deblocking filter in H.264, the filters of VC-1 perform all horizontal edges (for in-loop deblocking filtering) or vertical edges (for ove...
DAC
2003
ACM
14 years 9 months ago
2003
ACM
Widespread adoption of reconfigurable devices requires system level synthesis techniques to take an application written in a high level language and map it to the reconfigurable d...
DAC
2000
ACM
14 years 9 months ago
2000
ACM
Memory delays represent a major bottleneck in embedded systems performance. Newer memory modules exhibiting efficient access modes (e.g., page-, burst-mode) partly alleviate this ...