1198 search results - page 34 / 240 » Compiling for EDGE Architectures |
LCTRTS
2007
Springer
14 years 3 months ago
2007
Springer
High-performance and low-power VLIW DSP processors are increasingly deployed on embedded devices to process video and multimedia applications. For reducing power and cost in desig...
MICRO
1997
IEEE
14 years 1 months ago
1997
IEEE
Compiler optimizations are often driven by specific assumptions about the underlying architecture and implementation of the target machine. For example, when targeting shared-mem...
CASES
2006
ACM
14 years 2 months ago
2006
ACM
The architectural design of embedded systems is becoming increasingly idiosyncratic to meet varying constraints regarding energy consumption, code size, and execution time. Tradit...
CGO
2007
IEEE
14 years 24 days ago
2007
IEEE
Dynamic predication has been proposed to reduce the branch misprediction penalty due to hard-to-predict branch instructions. A recently proposed dynamic predication architecture, ...
ISPDC
2010
IEEE
13 years 7 months ago
2010
IEEE
—Super-scalar, out-of-order processors that can have tens of read and write requests in the execution window place significant demands on Memory Level Parallelism (MLP). Multi- ...