1198 search results - page 80 / 240 » Compiling for EDGE Architectures |
CODES
2007
IEEE
14 years 3 months ago
2007
IEEE
We address the problem of instruction selection for Multi-Output Instructions (MOIs), producing more than one result. Such inherently parallel hardware instructions are very commo...
MVA
1992
13 years 10 months ago
1992
This paper describes a method to perform distance measurements inside buildings using a single video camera mounted on a mobile robot. This algorithm is designed specifically to c...
ISCAS
2003
IEEE
14 years 2 months ago
2003
IEEE
A new vision chip, SCAMP-2, has been developed in a 0.35µm CMOS technology. In this paper, the design of the chip is presented, with particular emphasis on its readout architectu...
ICNS
2007
IEEE
14 years 3 months ago
2007
IEEE
Abstract—This paper presents a novel architecture for Gridenabled optical burst switched networks. We suggest an overall Grid network architecture and we propose a Grid Optical U...
AHS
2006
IEEE
14 years 3 months ago
2006
IEEE
This paper presents an efficient hardware architecture for real-time implementation of adaptive deblocking filter algorithm used in H.264 video coding standard. This hardware is d...