931 search results - page 136 / 187 » Compiling for vector-thread architectures |
121
Voted
HIPEAC
2010
Springer
15 years 6 months ago
2010
Springer
Abstract. Publish-subscribe systems present the state of the art in information dissemination to multiple users. Such systems have evolved from simple topic-based to the current XM...
116
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IWMM
2010
Springer
15 years 6 months ago
2010
Springer
Concurrent and incremental collectors require barriers to ensure correct synchronisation between mutator and collector. The overheads imposed by particular barriers on particular ...
136
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HIPEAC
2009
Springer
15 years 6 months ago
2009
Springer
Abstract. On multi-core architectures with software-managed memories, effectively orchestrating data movement is essential to performance, but is tedious and error-prone. In this p...
154
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APCSAC
2000
IEEE
15 years 6 months ago
2000
IEEE
Dataflow computation models enable simpler and more efficient management of the memory hierarchy - a key barrier to the performance of many parallel programs. This paper describes...
113
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TVLSI
2008
15 years 2 months ago
2008
Recently, it has become possible to implement floating-point cores on field-programmable gate arrays (FPGAs) to provide acceleration for the myriad applications that require high-p...