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» Compiling for vector-thread architectures
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CASES
2008
ACM
15 years 4 months ago
Efficient vectorization of SIMD programs with non-aligned and irregular data access hardware
Automatic vectorization of programs for partitioned-ALU SIMD (Single Instruction Multiple Data) processors has been difficult because of not only data dependency issues but also n...
Hoseok Chang, Wonyong Sung
155
Voted
ANLP
2000
149views more  ANLP 2000»
15 years 3 months ago
Javox: A Toolkit for Building Speech-Enabled Applications
JAVOX provides a mechanism for the development of spoken-language systems from existing desktop applications. We present an architecture that allows existing Java1 programs to be ...
Michael S. Fulkerson, Alan W. Biermann
139
Voted
TPDS
2008
150views more  TPDS 2008»
15 years 2 months ago
Mitosis: A Speculative Multithreaded Processor Based on Precomputation Slices
This paper presents the Mitosis framework, which is a combined hardware-software approach to speculative multithreading, even in the presence of frequent dependences among threads....
Carlos Madriles, Carlos García Quiño...
186
Voted
ICDE
2007
IEEE
125views Database» more  ICDE 2007»
16 years 3 months ago
Collecting and Maintaining Just-in-Time Statistics
Traditional DBMSs decouple statistics collection and query optimization both in space and time. Decoupling in time may lead to outdated statistics. Decoupling in space may cause s...
Amr El-Helw, Ihab F. Ilyas, Wing Lau, Volker Markl...
124
Voted
DAC
2009
ACM
16 years 3 months ago
A DVS-based pipelined reconfigurable instruction memory
Energy consumption is of significant concern in battery operated embedded systems. In the processors of such systems, the instruction cache consumes a significant fraction of the ...
Zhiguo Ge, Tulika Mitra, Weng-Fai Wong