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FPL
2007
Springer
99views Hardware» more  FPL 2007»
15 years 10 months ago
Disjoint Pattern Enumeration for Custom Instructions Identification
Extensible processors allow addition of application-specific custom instructions to the core instruction set architecture. These custom instructions are selected through an analys...
Pan Yu, Tulika Mitra
CGO
2004
IEEE
15 years 10 months ago
Software-Controlled Operand-Gating
Operand gating is a technique for improving processor energy efficiency by gating off sections of the data path that are unneeded by short-precision (narrow) operands. A method fo...
Ramon Canal, Antonio González, James E. Smi...
FPL
2006
Springer
105views Hardware» more  FPL 2006»
15 years 10 months ago
A Scalable Network ASIP Enabling Flow Awareness in Ethernet Access
In this paper we research an FPGA based Application Specific Instruction Set Processor (ASIP) tailored to the needs of a flow aware Ethernet access node. The processor has an arch...
K. Van Renterghem, Dieter Verhulst, S. Verschuere,...
196
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ATS
2001
IEEE
172views Hardware» more  ATS 2001»
15 years 10 months ago
A Built-in Self-Test and Self-Diagnosis Scheme for Heterogeneous SRAM Clusters
Testing and diagnosis are important issues in system-onchip (SOC) development, as more and more embedded cores are being integrated into the chips. In this paper we propose a buil...
Chih-Wea Wang, Ruey-Shing Tzeng, Chi-Feng Wu, Chih...
HYBRID
2000
Springer
15 years 10 months ago
Modular Specification of Hybrid Systems in CHARON
Abstract. We propose a language, called Charon, for modular specification of interacting hybrid systems. For hierarchical description of the system architecture, Charon supports bu...
Rajeev Alur, Radu Grosu, Yerang Hur, Vijay Kumar, ...