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FPL
2000
Springer
143views Hardware» more  FPL 2000»
15 years 6 months ago
Memory Access Schemes for Configurable Processors
Abstract. This work discusses the Memory Architecture for Reconfigurable Computers (MARC), a scalable, device-independent memory interface that supports both irregular (via configu...
Holger Lange, Andreas Koch
COMPCON
1996
IEEE
15 years 6 months ago
Architecture of a Broadband MediaProcessor
A broadband mediaprocessor is a general-purpose computer system which reaches the goal of communicating and processing at broadband rates using compiled software rather than speci...
Craig Hansen
ASPLOS
2006
ACM
15 years 8 months ago
A spatial path scheduling algorithm for EDGE architectures
Growing on-chip wire delays are motivating architectural features that expose on-chip communication to the compiler. EDGE architectures are one example of communication-exposed mi...
Katherine E. Coons, Xia Chen, Doug Burger, Kathryn...
EUROPAR
2000
Springer
15 years 6 months ago
BitValue Inference: Detecting and Exploiting Narrow Bitwidth Computations
We present a compiler algorithm called BitValue, which can discover both unused and constant bits in dusty-deck C programs. BitValue uses forward and backward dataflow analyses, ge...
Mihai Budiu, Majd Sakr, Kip Walker, Seth Copen Gol...
PLDI
2009
ACM
15 years 9 months ago
PetaBricks: a language and compiler for algorithmic choice
It is often impossible to obtain a one-size-fits-all solution for high performance algorithms when considering different choices for data distributions, parallelism, transformati...
Jason Ansel, Cy P. Chan, Yee Lok Wong, Marek Olsze...