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» Compiling for vector-thread architectures
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SCOPES
2004
Springer
14 years 23 days ago
Instruction Selection for Compilers that Target Architectures with Echo Instructions
Echo Instructions have recently been introduced to allow embedded processors to provide runtime decompression of LZ77-compressed programs at a minimal hardware cost compared to oth...
Philip Brisk, Ani Nahapetian, Majid Sarrafzadeh
LCPC
1999
Springer
13 years 11 months ago
Compiling for Speculative Architectures
The traditional target machine of a parallelizing compiler can execute code sections either serially or in parallel. In contrast, targeting the generated code to a speculative para...
Seon Wook Kim, Rudolf Eigenmann
CDES
2006
184views Hardware» more  CDES 2006»
13 years 8 months ago
Compilation for Future Nanocomputer Architectures
Compilation has a long history of translating a programmer's human-readable code into machine instructions designed to make good use of a specific target computer. In this pa...
Thomas P. Way
IEEEPACT
2003
IEEE
14 years 21 days ago
Compilation, Architectural Support, and Evaluation of SIMD Graphics Pipeline Programs on a General-Purpose CPU
Graphics and media processing is quickly emerging to become one of the key computing workloads. Programmable graphics processors give designers extra flexibility by running a sma...
Mauricio Breternitz Jr., Herbert H. J. Hum, Sanjee...
CASES
2008
ACM
13 years 9 months ago
Compiling custom instructions onto expression-grained reconfigurable architectures
While customizable processors aim at combining the flexibility of general purpose processors with the speed and power advantages of custom circuits, commercially available process...
Paolo Bonzini, Giovanni Ansaloni, Laura Pozzi