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CSEE
2000
Springer
13 years 11 months ago
Technology Transfer Issues for Formal Methods of Software Specification
Accurate and complete requirements specifications are crucial for the design and implementation of high-quality software. Unfortunately, the articulation and verification of softw...
Ken Abernethy, John C. Kelly, Ann E. Kelley Sobel,...
ICSE
2003
IEEE-ACM
14 years 7 months ago
Computer-Assisted Assume/Guarantee Reasoning with VeriSoft
We show how the state space exploration tool VeriSoft can be used to analyze parallel C/C++ programs compositionally. VeriSoft is used to check assume/guarantee specifications of ...
Jürgen Dingel
ASIAN
2007
Springer
126views Algorithms» more  ASIAN 2007»
14 years 1 months ago
Computational Semantics for Basic Protocol Logic - A Stochastic Approach
Abstract. This paper is concerned about relating formal and computational models of cryptography in case of active adversaries when formal security analysis is done with first ord...
Gergei Bana, Koji Hasebe, Mitsuhiro Okada
DANCE
2002
IEEE
14 years 8 days ago
Maude as a Wide-Spectrum Framework for Formal Modeling and Analysis of Active Networks
Modeling and formally analyzing active network systems and protocols is quite challenging, due to their highly dynamic nature and the need for new network models. We propose a wid...
José Meseguer, Peter Csaba Ölveczky, M...
DAC
1996
ACM
13 years 11 months ago
Integrating Formal Verification Methods with A Conventional Project Design Flow
We present a formal verification methodology that we have used on a computer system design project. The methodology integrates a temporal logic model checker with a conventional pr...
Ásgeir Th. Eiríksson