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» Completeness Results for Memory Logics
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IPPS
1998
IEEE
14 years 1 months ago
Update Protocols and Iterative Scientific Applications
Software DSMs have been a research topic for over a decade. While good performance has been achieved in some cases, consistent performance has continued to elude researchers. This...
Peter J. Keleher
DAC
1998
ACM
14 years 9 months ago
Functional Vector Generation for HDL Models Using Linear Programming and 3-Satisfiability
Abstract-Our strategy for automatic generation of functional vectors is based on exercising selected paths in the given hardware description language (HDL) model. The HDL model des...
Farzan Fallah, Srinivas Devadas, Kurt Keutzer
ISMVL
2009
IEEE
124views Hardware» more  ISMVL 2009»
14 years 3 months ago
Equivalence Checking of Reversible Circuits
Determining the equivalence of reversible circuits designed to meet a common specification is considered. The circuits’ primary inputs and outputs must be in pure logic states ...
Robert Wille, Daniel Große, D. Michael Mille...
SPE
2002
141views more  SPE 2002»
13 years 8 months ago
Data collection and restoration for heterogeneous process migration
This study presents a practical solution for data collection and restoration to migrate a process written in high level stack-based languages such as C and Fortran over a network ...
Kasidit Chanchio, Xian-He Sun
SAS
2009
Springer
171views Formal Methods» more  SAS 2009»
14 years 9 months ago
Bottom-Up Shape Analysis
In this paper we present a new shape analysis algorithm. The key distinguishing aspect of our algorithm is that it is completely compositional, bottom-up and non-iterative. We pres...
Bhargav S. Gulavani, Supratik Chakraborty, Ganesan...