Sciweavers

903 search results - page 110 / 181
» Completeness Results for Memory Logics
Sort
View
LPNMR
1993
Springer
14 years 1 months ago
Negation as Partial Failure
We present a logic programming language which uses a four-valued bilattice as the underlying framework for semantics of programs. The two orderings of the bilattice reflect the c...
Bamshad Mobasher, Jacek Leszczylowski, Don Pigozzi
CAL
2010
13 years 5 months ago
SMT-Directory: Efficient Load-Load Ordering for SMT
Memory models like SC, TSO, and PC enforce load-load ordering, requiring that loads from any single thread appear to occur in program order to all other threads. Out-of-order execu...
A. Hilton, A. Roth
EDBT
2011
ACM
209views Database» more  EDBT 2011»
13 years 12 days ago
An optimal strategy for monitoring top-k queries in streaming windows
Continuous top-k queries, which report a certain number (k) of top preferred objects from data streams, are important for a broad class of real-time applications, ranging from fi...
Di Yang, Avani Shastri, Elke A. Rundensteiner, Mat...
CCS
2009
ACM
14 years 6 days ago
Filter-resistant code injection on ARM
Code injections attacks are one of the most powerful and important classes of attacks on software. In such attacks, the attacker sends malicious input to a software application, w...
Yves Younan, Pieter Philippaerts, Frank Piessens, ...
ISCA
2005
IEEE
119views Hardware» more  ISCA 2005»
14 years 2 months ago
Rescue: A Microarchitecture for Testability and Defect Tolerance
Scaling feature size improves processor performance but increases each device’s susceptibility to defects (i.e., hard errors). As a result, fabrication technology must improve s...
Ethan Schuchman, T. N. Vijaykumar