903 search results - page 114 / 181 » Completeness Results for Memory Logics |
GLVLSI
2006
IEEE
14 years 3 months ago
2006
IEEE
Functional verification is one of the major bottlenecks in microprocessor design. Simulation-based techniques are the most widely used form of processor verification. Efficient ...
FCCM
2003
IEEE
14 years 2 months ago
2003
IEEE
FPGAs have appealing features such as customizable internal and external bandwidth and the ability to exploit vast amounts of fine-grain parallelism. In this paper we explore the ...
TLDI
2003
ACM
14 years 2 months ago
2003
ACM
We extend Cyclone, a type-safe polymorphic language at vel of abstraction, with threads and locks. Data races can violate type safety in Cyclone. An extended type system staticall...
DAC
1999
ACM
14 years 1 months ago
1999
ACM
: In this work we propose a technique for spatial and temporal partitioning of a logic circuit based on the nodes activity computed by using a simulation at an higher level of ion....
ISCA
1990
IEEE
14 years 29 days ago
1990
IEEE
Improvements in disk speeds have not kept up with improvements in processor and memory speeds. One way to correct the resulting speed mismatch is to stripe data across many disks. ...