As the size of FPGA devices grows following Moore’s law, it becomes possible to put a complete manycore system onto a single FPGA chip. The centralized memory hierarchy on typica...
Sen Ma, Miaoqing Huang, Eugene Cartwright, David L...
In this paper a general framework for separation logic inside the HOL theorem prover is presented. This framework is based on Abeparation Logic. It contains a model of an abstract,...
Abstract. In this paper we study families of resource aware logics that explore resource restriction on rules; in particular, we study the use of controlled cut-rule and introduce ...
We study games in which the choices available to players are not fixed, and may change during the course of play. Specifically, we consider a model in which players may switch st...
This paper considers quasi-reduced multi-valued decision diagrams with bits (QRMDD( )s) to represent twovalued logic functions. It shows relations between the numbers of nodes in ...