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PVLDB
2008
96views more  PVLDB 2008»
13 years 8 months ago
H-store: a high-performance, distributed main memory transaction processing system
Our previous work has shown that architectural and application shifts have resulted in modern OLTP databases increasingly falling short of optimal performance [10]. In particular,...
Robert Kallman, Hideaki Kimura, Jonathan Natkins, ...
DATE
2010
IEEE
130views Hardware» more  DATE 2010»
14 years 16 days ago
Supporting Distributed Shared Memory on multi-core Network-on-Chips using a dual microcoded controller
Abstract—Supporting Distributed Shared Memory (DSM) is essential for multi-core Network-on-Chips for the sake of reusing huge amount of legacy code and easy programmability. We p...
Xiaowen Chen, Zhonghai Lu, Axel Jantsch, Shuming C...
DSN
2002
IEEE
14 years 1 months ago
Modeling the Effect of Technology Trends on the Soft Error Rate of Combinational Logic
This paper examines the effect of technology scaling and microarchitectural trends on the rate of soft errors in CMOS memory and logic circuits. We describe and validate an end-to...
Premkishore Shivakumar, Michael Kistler, Stephen W...
HPCA
2000
IEEE
14 years 1 months ago
Coherence Communication Prediction in Shared-Memory Multiprocessors
Abstract—Sharing patterns in shared-memory multiprocessors are the key to performance: uniprocessor latencytolerating techniques such as out-of-order execution and non-blocking c...
Stefanos Kaxiras, Cliff Young
JAPLL
2007
142views more  JAPLL 2007»
13 years 8 months ago
Cut-free common knowledge
Starting off from the infinitary system for common knowledge over multi-modal epistemic logic presented in Alberucci and J¨ager [1], we apply the finite model property to “...
Gerhard Jäger, Mathis Kretz, Thomas Studer