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IOLTS
2008
IEEE
102views Hardware» more  IOLTS 2008»
14 years 3 months ago
Integrating Scan Design and Soft Error Correction in Low-Power Applications
— Error correcting coding is the dominant technique to achieve acceptable soft-error rates in memory arrays. In many modern circuits, the number of memory elements in the random ...
Michael E. Imhof, Hans-Joachim Wunderlich, Christi...
AAI
2010
108views more  AAI 2010»
13 years 9 months ago
Augmenting Subsumption Propagation in Distributed Description Logics
Distributed Description Logics (DDL) enable reasoning with multiple ontologies interconnected by directional semantic mapping, called bridge rules. Bridge rules map concepts of a s...
Martin Homola, Luciano Serafini
CADE
2005
Springer
14 years 9 months ago
Reflecting Proofs in First-Order Logic with Equality
Our general goal is to provide better automation in interactive proof assistants such as Coq. We present an interpreter of proof traces in first-order multi-sorted logic with equal...
Evelyne Contejean, Pierre Corbineau
DATE
2009
IEEE
141views Hardware» more  DATE 2009»
14 years 3 months ago
Design of compact imperfection-immune CNFET layouts for standard-cell-based logic synthesis
– The quest for technologies with superior device characteristics has showcased Carbon Nanotube Field Effect Transistors (CNFETs) into limelight. Among the several design aspects...
Shashikanth Bobba, Jie Zhang, Antonio Pullini, Dav...
SEMWEB
2009
Springer
14 years 3 months ago
Processing OWL2 Ontologies using Thea: An Application of Logic Programming
Traditional object-oriented programming languages can be difficult to use when working with ontologies, leading to the creation of domain-specific languages designed specifically...
Vangelis Vassiliadis, Jan Wielemaker, Chris Mungal...