In this paper, we address the power-aware scheduling of sporadic constrained-deadline hard real-time tasks using dynamic voltage scaling upon multiprocessor platforms. We propose ...
We present a lightweight scheme for watermarking or annotating video clips with information describing the workload that would be incurred while decoding the clip. This informatio...
There are two basic models for the on-chip memory in CMP systems: hardware-managed coherent caches and software-managed streaming memory. This paper performs a direct comparison o...
Jacob Leverich, Hideho Arakida, Alex Solomatnikov,...
Parallel computing is widely used for large scale threedimensional simulation of seismic wave propagation. One particularity of most of these simulations is to consider a finite c...
Relentless CMOS scaling coupled with lower design tolerances is making ICs increasingly susceptible to wear-out related permanent faults and transient faults, necessitating on-chi...
Pramod Subramanyan, Virendra Singh, Kewal K. Saluj...