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CASES
2008
ACM
14 years 23 days ago
Efficiency and scalability of barrier synchronization on NoC based many-core architectures
Interconnects based on Networks-on-Chip are an appealing solution to address future microprocessor designs where, very likely, hundreds of cores will be connected on a single chip...
Oreste Villa, Gianluca Palermo, Cristina Silvano
BMCBI
2010
233views more  BMCBI 2010»
13 years 11 months ago
Odefy -- From discrete to continuous models
Background: Phenomenological information about regulatory interactions is frequently available and can be readily converted to Boolean models. Fully quantitative models, on the ot...
Jan Krumsiek, Sebastian Pölsterl, Dominik M. ...
ICMCS
2006
IEEE
154views Multimedia» more  ICMCS 2006»
14 years 4 months ago
Implementation and Evolution of Packet Striping for Media Streaming Over Multiple Burst-Loss Channels
Modern mobile devices are multi-homed with WLAN and WWAN communication interfaces. In a community of nodes with such multihomed devices — locally inter-connected via high-speed ...
Gene Cheung, Puneet Sharma, Sung-Ju Lee
ISCA
2011
IEEE
365views Hardware» more  ISCA 2011»
13 years 2 months ago
Kilo-NOC: a heterogeneous network-on-chip architecture for scalability and service guarantees
Today’s chip-level multiprocessors (CMPs) feature up to a hundred discrete cores, and with increasing levels of integration, CMPs with hundreds of cores, cache tiles, and specia...
Boris Grot, Joel Hestness, Stephen W. Keckler, Onu...
PODC
2009
ACM
14 years 11 months ago
Fast distributed random walks
Performing random walks in networks is a fundamental primitive that has found applications in many areas of computer science, including distributed computing. In this paper, we fo...
Atish Das Sarma, Danupon Nanongkai, Gopal Panduran...