ISCA 2011 - PDF Preprint Papers

ISCA 2011 International Symposium on Computer Architecture

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ISCA
2011
IEEE

522views Hardware» more ISCA 2011»

CPPC: correctable parity protected cache

13 years 4 months ago

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Due to shrinking feature sizes processors are becoming more vulnerable to soft errors. Write-back caches are particularly vulnerable since they hold dirty data that do not exist i...

Mehrtash Manoochehri, Murali Annavaram, Michel Dub...

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Id	Views	Title	Status

1	522	CPPC: correctable parity protected cache	claim
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7	313	FabScalar: composing synthesizable RTL designs of arbitrary cores within a canonical superscalar template	claim
8	305	DBAR: an efficient routing algorithm to support multiple concurrent applications in networks-on-chip	claim
9	294	Moguls: a model to explore the memory hierarchy for bandwidth improvements	claim
10	290	Increasing the effectiveness of directory caches by deactivating coherence for private memory blocks	claim
11	287	Scalable power control for many-core architectures running multi-threaded applications	claim
12	273	Bypass and insertion algorithms for exclusive last-level caches	claim
13	271	CRIB: consolidated rename, issue, and bypass	claim
14	270	Sampling + DMR: practical and low-overhead permanent fault detection	claim
15	269	Power management of online data-intensive services	claim
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19	238	Rebound: scalable checkpointing for coherent shared memory	claim
20	229	TLSync: support for multiple fast barriers using on-chip transmission lines	claim
21	225	FlexBulk: intelligently forming atomic blocks in blocked-execution multiprocessors to minimize squashes	claim

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