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CGO
2005
IEEE
14 years 13 days ago
Optimizing Sorting with Genetic Algorithms
The growing complexity of modern processors has made the generation of highly efficient code increasingly difficult. Manual code generation is very time consuming, but it is oft...
Xiaoming Li, María Jesús Garzar&aacu...
IPPS
2007
IEEE
14 years 1 months ago
Optimizing Sorting with Machine Learning Algorithms
The growing complexity of modern processors has made the development of highly efficient code increasingly difficult. Manually developing highly efficient code is usually expen...
Xiaoming Li, María Jesús Garzar&aacu...
RTSS
2003
IEEE
14 years 2 days ago
Data Caches in Multitasking Hard Real-Time Systems
Data caches are essential in modern processors, bridging the widening gap between main memory and processor speeds. However, they yield very complex performance models, which make...
Xavier Vera, Björn Lisper, Jingling Xue
ISCA
2010
IEEE
236views Hardware» more  ISCA 2010»
13 years 12 months ago
Elastic cooperative caching: an autonomous dynamically adaptive memory hierarchy for chip multiprocessors
Next generation tiled microarchitectures are going to be limited by off-chip misses and by on-chip network usage. Furthermore, these platforms will run an heterogeneous mix of ap...
Enric Herrero, José González, Ramon ...
CHI
1998
ACM
13 years 11 months ago
Triangles: Tangible Interface for Manipulation and Exploration of Digital Information Topography
This paper presents a system for interacting with digital information, called Triangles. The Triangles system is a physical/digital construction kit, which allows users to use two...
Matthew G. Gorbet, Maggie Orth, Hiroshi Ishii