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CAV
2009
Springer
177views Hardware» more  CAV 2009»
14 years 8 months ago
Software Transactional Memory on Relaxed Memory Models
Abstract. Pseudo-code descriptions of STMs assume sequentially consistent program execution and atomicity of high-level STM operations like read, write, and commit. These assumptio...
Rachid Guerraoui, Thomas A. Henzinger, Vasu Singh
WOTUG
2008
13 years 9 months ago
Experiments in Translating CSP || B to Handel-C
Abstract. This paper considers the issues involved in translating specifications described in the CSP B formal method into Handel-C. There have previously been approaches to transl...
Steve Schneider, Helen Treharne, Alistair McEwan, ...
JOT
2010
144views more  JOT 2010»
13 years 6 months ago
A Tool for Specifying and Validating Agents' Interaction Protocols: From Agent UML to Maude
To achieve the multi-agent systems’ goals, agents interact to exchange information, to cooperate and to coordinate their tasks. Interaction is generally recognized as an importa...
Farid Mokhati, Brahim Sahraoui, Soufiane Bouzaher,...
FOSSACS
1998
Springer
14 years 1 days ago
Generalizing Domain Theory
Abstract. Domain theory began in an attempt to provide mathematical models for high-level programming languages, an area where it has proved to be particularly useful. It is perhap...
Michael W. Mislove
MEMOCODE
2010
IEEE
13 years 5 months ago
A formal executable semantics of Verilog
This paper describes a formal executable semantics for the Verilog hardware description language. The goal of our formalization is to provide a concise and mathematically rigorous...
Patrick O'Neil Meredith, Michael Katelman, Jos&eac...