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CGO
2008
IEEE
14 years 3 months ago
Spice: speculative parallel iteration chunk execution
The recent trend in the processor industry of packing multiple processor cores in a chip has increased the importance of automatic techniques for extracting thread level paralleli...
Easwaran Raman, Neil Vachharajani, Ram Rangan, Dav...
CGO
2008
IEEE
14 years 3 months ago
Automatic array inlining in java virtual machines
Array inlining expands the concepts of object inlining to arrays. Groups of objects and arrays that reference each other are placed consecutively in memory so that their relative ...
Christian Wimmer, Hanspeter Mössenböck
CODES
2008
IEEE
14 years 3 months ago
Speculative DMA for architecturally visible storage in instruction set extensions
Instruction set extensions (ISEs) can accelerate embedded processor performance. Many algorithms for ISE generation have shown good potential; some of them have recently been expa...
Theo Kluter, Philip Brisk, Paolo Ienne, Edoardo Ch...
CODES
2008
IEEE
14 years 3 months ago
Static analysis of processor stall cycle aggregation
Processor Idle Cycle Aggregation (PICA) is a promising approach for low power execution of processors, in which small memory stalls are aggregated to create a large one, and the p...
Jongeun Lee, Aviral Shrivastava
ICDCS
2008
IEEE
14 years 3 months ago
Correlation-Aware Object Placement for Multi-Object Operations
A multi-object operation incurs communication or synchronization overhead when the requested objects are distributed over different nodes. The object pair correlations (the probab...
Ming Zhong, Kai Shen, Joel I. Seiferas
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