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» Computation hierarchy for in-network processing
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ASAP
2003
IEEE
108views Hardware» more  ASAP 2003»
14 years 1 months ago
Physical Planning for On-Chip Multiprocessor Networks and Switch Fabrics
On-chip implementation of multiprocessor systems requires the planarization of the interconnect network onto the silicon floorplan. Manual floorplanning approaches will become i...
Terry Tao Ye, Giovanni De Micheli
IMCSIT
2010
13 years 3 months ago
Hierarchical Object Categorization with Automatic Feature Selection
In this paper, we have introduced a hierarchical object categorization method with automatic feature selection. A hierarchy obtained by natural similarities and properties is learn...
Md. Saiful Islam, Andrzej Sluzek
PODC
2010
ACM
14 years 11 days ago
On asymmetric progress conditions
Wait-freedom and obstruction-freedom have received a lot of attention in the literature. These are symmetric progress conditions in the sense that they consider all processes as b...
Damien Imbs, Michel Raynal, Gadi Taubenfeld
ICMCS
2006
IEEE
141views Multimedia» more  ICMCS 2006»
14 years 2 months ago
Scalability of Multimedia Applications on Next-Generation Processors
In the near future, the majority of personal computers are expected to have several processing units. This is referred to as Core Multiprocessing (CMP). Furthermore, each of the c...
Guy Amit, Yaron Caspi, Ran Vitale, Adi Pinhas
AINA
2003
IEEE
14 years 4 days ago
Formal Verification of Condition Data Flow Diagrams for Assurance of Correct Network Protocols
Condition Data Flow Diagrams (CDFDs) are a formalized notation resulting from the integration of Yourdon Data Flow Diagrams, Petri Nets, and pre-post notation. They are used in th...
Shaoying Liu