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» Computational Intelligence in Circuit Synthesis
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ISPD
2003
ACM
110views Hardware» more  ISPD 2003»
14 years 22 days ago
Explicit gate delay model for timing evaluation
Delay evaluation is always a crucial concern in the VLSI design and it becomes increasingly more critical in the nowadays deep-submicron technology. To obtain an accurate delay va...
Muzhou Shao, Martin D. F. Wong, Huijing Cao, Youxi...
DAC
2005
ACM
14 years 8 months ago
Hardware speech recognition for user interfaces in low cost, low power devices
We propose a system architecture for real-time hardware speech recognition on low-cost, power-constrained devices. The system is intended to support real-time speech-based user in...
Sergiu Nedevschi, Rabin K. Patra, Eric A. Brewer
GECCO
2005
Springer
127views Optimization» more  GECCO 2005»
14 years 1 months ago
Investigating the performance of module acquisition in cartesian genetic programming
Embedded Cartesian Genetic Programming (ECGP) is a form of the graph based Cartesian Genetic Programming (CGP) in which modules are automatically acquired and evolved. In this pap...
James Alfred Walker, Julian Francis Miller
BIRTHDAY
2004
Springer
14 years 27 days ago
Engineers Don't Search
Abstract. This paper is on the automation of knowledge-intensive tasks in engineering domains; here, the term “task” relates to analysis and synthesis tasks, such as diagnosis ...
Benno Stein
CA
2002
IEEE
14 years 13 days ago
Model-based Animation of Coverbal Gesture
Virtual conversational agents are supposed to combine speech with nonverbal modalities for intelligible and believeable utterances. However, the automatic synthesis of coverbal ge...
Stefan Kopp, Ipke Wachsmuth