51 search results - page 7 / 11 » Computational Properties of Mesh Connected Trees: Versatile ... |
ISVLSI
2002
IEEE
14 years 8 days ago
2002
IEEE
We propose a packet switched platform for single chip systems which scales well to an arbitrary number of processor like resources. The platform, which we call Network-on-Chip (NO...
AI
2010
Springer
13 years 7 months ago
2010
Springer
Combining constraints using logical connectives such as disjunction is ubiquitous in constraint programming, because it adds considerable expressive power to a constraint language...
SIAMCOMP
2000
13 years 7 months ago
2000
This paper describes a scheme to implement a shared address space of size m on an n-node mesh, with m polynomial in n, where each mesh node hosts a processor and a memory module. A...
HPCA
2009
IEEE
14 years 8 months ago
2009
IEEE
Performance and power consumption of an on-chip interconnect that forms the backbone of Chip Multiprocessors (CMPs), are directly influenced by the underlying network topology. Bo...
PODS
1994
ACM
13 years 11 months ago
1994
ACM
Traditionally, computational complexity has considered only static problems. Classical Complexity Classes such as NC, P, and NP are de ned in terms of the complexity of checking {...