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DAC
2009
ACM
14 years 8 months ago
Handling complexities in modern large-scale mixed-size placement
In this paper, we propose an effective algorithm flow to handle largescale mixed-size placement. The basic idea is to use floorplanning to guide the placement of objects at the gl...
Jackey Z. Yan, Natarajan Viswanathan, Chris Chu
DAC
2009
ACM
14 years 8 months ago
Double patterning lithography friendly detailed routing with redundant via consideration
In double patterning lithography (DPL), coloring conflict and stitch minimization are the two main challenges. Post layout decomposition algorithm [1] [2]may not be enough to achi...
Kun Yuan, Katrina Lu, David Z. Pan
DAC
2008
ACM
14 years 8 months ago
Type-matching clock tree for zero skew clock gating
Clock skew minimization is always very important in the clock tree synthesis. Due to clock gating, the clock tree may include different types of logic gates, e.g., AND gates, OR g...
Chia-Ming Chang, Shih-Hsu Huang, Yuan-Kai Ho, Jia-...
DAC
2008
ACM
14 years 8 months ago
Broadcast electrode-addressing for pin-constrained multi-functional digital microfluidic biochips
Recent advances in digital microfluidics have enabled lab-on-a-chip devices for DNA sequencing, immunoassays, clinical chemistry, and protein crystallization. Basic operations suc...
Tao Xu, Krishnendu Chakrabarty
IEEEPACT
2006
IEEE
14 years 1 months ago
Testing implementations of transactional memory
Transactional memory is an attractive design concept for scalable multiprocessors because it offers efficient lock-free synchronization and greatly simplifies parallel software....
Chaiyasit Manovit, Sudheendra Hangal, Hassan Chafi...