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DAC
2009
ACM
14 years 2 months ago
Clock skew optimization via wiresizing for timing sign-off covering all process corners
Manufacturing process variability impacts the performance of synchronous logic circuits by means of its effect on both clock network and functional block delays. Typically, varia...
Sari Onaissi, Khaled R. Heloue, Farid N. Najm
DAC
2010
ACM
13 years 10 months ago
Scalable specification mining for verification and diagnosis
Effective system verification requires good specifications. The lack of sufficient specifications can lead to misses of critical bugs, design re-spins, and time-to-market slips. I...
Wenchao Li, Alessandro Forin, Sanjit A. Seshia
PARA
1995
Springer
13 years 11 months ago
ScaLAPACK Tutorial
Abstract. ScaLAPACK is a library of high performance linear algebra routines for distributed memory MIMD computers. It is a continuation of the LAPACK project, which designed and p...
Jack Dongarra, Antoine Petitet
SMA
2005
ACM
132views Solid Modeling» more  SMA 2005»
14 years 28 days ago
Simplified engineering analysis via medial mesh reduction
Numerous simplification methods have been proposed for speeding up engineering analysis/ simulation. A recently proposed medial axis reduction is one such method, that is particul...
Murari Sinha, Krishnan Suresh
DAC
2007
ACM
14 years 8 months ago
RQL: Global Placement via Relaxed Quadratic Spreading and Linearization
This paper describes a simple and effective quadratic placement algorithm called RQL. We show that a good quadratic placement, followed by local wirelength-driven spreading can pr...
Natarajan Viswanathan, Gi-Joon Nam, Charles J. Alp...