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ISVLSI
2002
IEEE
109views VLSI» more  ISVLSI 2002»
14 years 2 months ago
A Network on Chip Architecture and Design Methodology
We propose a packet switched platform for single chip systems which scales well to an arbitrary number of processor like resources. The platform, which we call Network-on-Chip (NO...
Shashi Kumar, Axel Jantsch, Mikael Millberg, Johnn...
HPDC
2007
IEEE
14 years 4 months ago
A fast topology inference: a building block for network-aware parallel processing
Adapting to the network is the key to achieving high performance for communication-intensive applications, including scientific computing, data intensive computing, and multicast...
Tatsuya Shirai, Hideo Saito, Kenjiro Taura
BMCBI
2006
117views more  BMCBI 2006»
13 years 10 months ago
The Cluster Variation Method for Efficient Linkage Analysis on Extended Pedigrees
Background: Computing exact multipoint LOD scores for extended pedigrees rapidly becomes infeasible as the number of markers and untyped individuals increase. When markers are exc...
Cornelis A. Albers, Martijn A. R. Leisink, Hilbert...
PODC
2004
ACM
14 years 3 months ago
Balanced binary trees for ID management and load balance in distributed hash tables
We present a low-cost, decentralized algorithm for ID management in distributed hash tables (DHTs) managed by a dynamic set of hosts. Each host is assigned an ID in the unit inter...
Gurmeet Singh Manku
SPAA
2003
ACM
14 years 3 months ago
Short length menger's theorem and reliable optical routing
In the minimum path coloring problem, we are given a graph and a set of pairs of vertices of the graph and we are asked to connect the pairs by colored paths in such a way that pa...
Amitabha Bagchi, Amitabh Chaudhary, Petr Kolman