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PPOPP
2005
ACM
15 years 8 months ago
Exposing disk layout to compiler for reducing energy consumption of parallel disk based systems
Disk subsystem is known to be a major contributor to overall power consumption of high-end parallel systems. Past research proposed several architectural level techniques to reduc...
Seung Woo Son, Guangyu Chen, Mahmut T. Kandemir, A...
114
Voted
SBCCI
2005
ACM
114views VLSI» more  SBCCI 2005»
15 years 8 months ago
Traffic generation and performance evaluation for mesh-based NoCs
The designer of a system on a chip (SoC) that connects IP cores through a network on chip (NoC) needs methods to support application performance evaluation. Two key aspects these ...
Leonel Tedesco, Aline Mello, Diego Garibotti, Ney ...
130
Voted
SENSYS
2005
ACM
15 years 8 months ago
Estimating clock uncertainty for efficient duty-cycling in sensor networks
Radio duty cycling has received significant attention in sensor networking literature, particularly in the form of protocols for medium access control and topology management. Whi...
Saurabh Ganeriwal, Deepak Ganesan, Hohyun Shim, Vl...
SIGCOMM
2005
ACM
15 years 8 months ago
Declarative routing: extensible routing with declarative queries
The Internet’s core routing infrastructure, while arguably robust and efficient, has proven to be difficult to evolve to accommodate the needs of new applications. Prior researc...
Boon Thau Loo, Joseph M. Hellerstein, Ion Stoica, ...
SLIP
2005
ACM
15 years 8 months ago
Multilevel full-chip routing with testability and yield enhancement
We propose in this paper a multilevel full-chip routing algorithm that improves testability and diagnosability, manufacturability, and signal integrity for yield enhancement. Two ...
Katherine Shu-Min Li, Chung-Len Lee, Yao-Wen Chang...
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