Current instruction fetch policies in SMT processors are oriented towards optimization of overall throughput and/or fairness. However, they provide no control over how individual ...
Francisco J. Cazorla, Peter M. W. Knijnenburg, Riz...
Microprocessor designers use techniques such as clock gating to reduce power dissipation. An unfortunate side-effect of these techniques is the processor current fluctuations th...
A new modeling framework is introduced for the analytical study of medium access control (MAC) protocols operating in multihop ad hoc networks. The model takes into account the eï...
Marcelo M. Carvalho, Jose Joaquin Garcia-Luna-Acev...
In this paper we conduct a feasibility study of delay-critical safety applications over vehicular ad hoc networks based on the emerging dedicated short range communications (DSRC)...
Jijun Yin, Tamer A. ElBatt, Gavin Yeung, Bo Ryu, S...
Recent trends in sensor network simulation can be divided between less flexible but accurate emulation based approach and more generic but less detailed network simulator models....