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SAC
2010
ACM
13 years 9 months ago
Efficient mapping and voltage islanding technique for energy minimization in NoC under design constraints
Voltage islanding technique in Network-on-Chip (NoC) can significantly reduce the computational energy consumption by scaling down the voltage levels of the processing elements (P...
Pavel Ghosh, Arunabha Sen
CORR
2002
Springer
95views Education» more  CORR 2002»
13 years 8 months ago
Unsupervised Learning of Morphology without Morphemes
The first morphological learner based upon the theory of Whole Word Morphology (Ford et al., 1997) is outlined, and preliminary evaluation results are presented. The program, Whol...
Sylvain Neuvel, Sean A. Fulop
EUROSYS
2010
ACM
14 years 2 months ago
PUSH: A Dataflow Shell
The deluge of huge data sets such as those provided by sensor networks, online transactions, and the web provide exciting opportunities for data analysis. The scale of the data ...
Noah Evans, Eric Van Hensbergen
IPPS
2007
IEEE
14 years 3 months ago
Experience of Optimizing FFT on Intel Architectures
Automatic library generators, such as ATLAS [11], Spiral [8] and FFTW [2], are promising technologies to generate efficient code for different computer architectures. The library...
Daniel Orozco, Liping Xue, Murat Bolat, Xiaoming L...
ISQED
2006
IEEE
147views Hardware» more  ISQED 2006»
14 years 2 months ago
Compact Reduced Order Modeling for Multiple-Port Interconnects
— In this paper, we propose an efficient model order reduction (MOR) algorithm, called MTermMOR, for modeling interconnect circuits with large number of external ports. The prop...
Pu Liu, Sheldon X.-D. Tan, Bruce McGaughy, Lifeng ...