Process induced threshold voltage variations bring about fluctuations in circuit delay, that affect the FPGA timing yield. We propose an adaptive FPGA architecture that compensate...
Multimedia SoCs are characterized by a main controller that directs the activity of several cores, each of which is in charge of a stage in the processing of a media stream. The v...
Amir Nahir, Avi Ziv, Roy Emek, Tal Keidar, Nir Ron...
Most FPGA technology mapping approaches either target Lookup Tables (LUTs) or relatively simple Programmable Logic Blocks (PLBs). Considering networks of PLBs during technology map...
Sean Safarpour, Andreas G. Veneris, Gregg Baeckler...
ing from Robot Sensor Data using Hidden Markov Models Laura Firoiu, Paul Cohen Computer Science Department, LGRC University of Massachusetts at Amherst, Box 34610 Amherst, MA 01003...
Semantic caching is an important technology for improving the response time of future user queries specified over remote servers. This paper deals with the fundamental query conta...