Chip Multiprocessors (CMPs) allow different applications to concurrently execute on a single chip. When applications with differing demands for memory compete for a shared cache, ...
Aamer Jaleel, William Hasenplaugh, Moinuddin K. Qu...
This paper presents the implementation and performance evaluation of a real, secure object-based storage system compliant to the TIO OSD standard. In contrast to previous work, ou...
Zhongying Niu, Ke Zhou, Dan Feng, Hong Jiang, Fran...
Sorting is a memory intensive operation whose performance is greatly affected by the amount of memory available as work space. When the input size is unknown or available memory s...
—This paper addresses the problem of providing congestion-management for a shared wireless sensor networkbased target tracking system. In many large-scale wireless sensor network...
Lei Chen 0005, Boleslaw K. Szymanski, Joel W. Bran...