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    » Concurrent Methodologies for Global Optimization
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    CLEIEJ
    2006
    88views more  CLEIEJ 2006»
    A Stochastic Concurrent Constraint Based Framework to Model and Verify Biological Systems
    13 years 8 months ago
    A Stochastic Concurrent Constraint Based Framework to Model and Verify Biological Systems
    Download  www.clei.cl
    Concurrent process calculi are powerful formalisms for modelling concurrent systems. The mathematical style underlying process calculi allow to both model and verify properties of...
    Carlos Olarte, Camilo Rueda
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    ASPDAC
    2008
    ACM
    74views Hardware» more  ASPDAC 2008»
    Large-scale fixed-outline floorplanning design using convex optimization techniques
    13 years 10 months ago
    Large-scale fixed-outline floorplanning design using convex optimization techniques
    Download  orion.math.uwaterloo.ca
    A two-stage optimization methodology is proposed to solve the fixed-outline floorplanning problem that is a global optimization problem for wirelength minimization. In the first st...
    Chaomin Luo, Miguel F. Anjos, Anthony Vannelli
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    SAMOS
    2010
    Springer
    185views Embedded Systems» more  SAMOS 2010»
    Programming multi-core architectures using Data-Flow techniques
    13 years 7 months ago
    Programming multi-core architectures using Data-Flow techniques
    Download  www.cs.ucy.ac.cy
    Abstract—In this paper we present a Multithreaded programming methodology for multi-core systems that utilizes DataFlow concurrency. The programmer augments the program with macr...
    Samer Arandi, Paraskevas Evripidou
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    DAC
    1997
    ACM
    205views Computer Architecture» more  DAC 1997»
    Power Supply Noise Analysis Methodology for Deep-Submicron VLSI Chip Design
    14 years 26 days ago
    Power Supply Noise Analysis Methodology for Deep-Submicron VLSI Chip Design
    Download  domino.research.ibm.com
    This paper describes a new design methodology to analyze the on-chip power supply noise for high performance microprocessors. Based on an integrated package-level and chip-level p...
    Howard H. Chen, David D. Ling
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    DAC
    2007
    ACM
    152views Computer Architecture» more  DAC 2007»
    Global Critical Path: A Tool for System-Level Timing Analysis
    14 years 9 months ago
    Global Critical Path: A Tool for System-Level Timing Analysis
    Download  research.microsoft.com
    An effective method for focusing optimization effort on the most important parts of a design is to examine those elements on the critical path. Traditionally, the critical path is...
    Girish Venkataramani, Mihai Budiu, Tiberiu Chelcea...
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