Abstract. The classical work on test case generation and formal methods focuses either on algebraic or model-based specifications. In this paper we propose an approach to derive t...
This paper explores an approach to improving the practical usability of static verification tools for debugging synchronization idioms. Synchronization idioms such as mutual excl...
Tayfun Elmas, Ali Sezgin, Serdar Tasiran, Shaz Qad...
This paper describes an efficient error simulator able to analyze functional VHDL descriptions. The proposed simulation environment can be based on commercial VHDL simulators. Al...
Model-based testing as a black-box testing technique has grown in importance. The models used represent the relevant features of the system under consideration (SUC), and can also...
We build a realizability model for linear logic using a name-passing process calculus. The construction is based on testing semantics for processes, drawing ideas from spatial and...