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116
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DAC
2007
ACM
16 years 3 months ago
Transition Delay Fault Test Pattern Generation Considering Supply Voltage Noise in a SOC Design
Due to shrinking technology, increasing functional frequency and density, and reduced noise margins with supply voltage scaling, the sensitivity of designs to supply voltage noise...
Nisar Ahmed, Mohammad Tehranipoor, Vinay Jayaram
127
Voted
ISSTA
2009
ACM
15 years 9 months ago
Precise pointer reasoning for dynamic test generation
Dynamic test generation consists of executing a program while gathering symbolic constraints on inputs from predicates encountered in branch statements, and of using a constraint ...
Bassem Elkarablieh, Patrice Godefroid, Michael Y. ...
124
Voted
GLVLSI
2002
IEEE
108views VLSI» more  GLVLSI 2002»
15 years 7 months ago
Protected IP-core test generation
Design simplification is becoming necessary to respect the target time-to-market of SoCs, and this goal can be obtained by using predesigned IP-cores. However, their correct inte...
Alessandro Fin, Franco Fummi
129
Voted
TC
1998
15 years 2 months ago
Abstraction Techniques for Validation Coverage Analysis and Test Generation
ion Techniques for Validation Coverage Analysis and Test Generation Dinos Moundanos, Jacob A. Abraham, Fellow, IEEE, and Yatin V. Hoskote —The enormous state spaces which must be...
Dinos Moundanos, Jacob A. Abraham, Yatin Vasant Ho...
120
Voted
KBSE
2007
IEEE
15 years 9 months ago
Nighthawk: a two-level genetic-random unit test data generator
Randomized testing has been shown to be an effective method for testing software units. However, the thoroughness of randomized unit testing varies widely according to the settin...
James H. Andrews, Felix Chun Hang Li, Tim Menzies