Abstraction Techniques for Validation Coverage Analysis and Test Generation

ion Techniques for Validation Coverage Analysis and Test Generation Dinos Moundanos, Jacob A. Abraham, Fellow, IEEE, and Yatin V. Hoskote —The enormous state spaces which must be searched when verifying the correctness of, or generating tests for, complex precludes the use of traditional approaches. Hard-to-find abstractions are often required to simplify the circuits and make the problems tractable. This paper presents a simple and automatic method to extract the control flow of a circuit so that the resulting state space can be explored for validation coverage analysis and automatic test generation. This control flow, capturing the essential “behavior” of the circuit, is represented as a finite state machine called the ECFM (Extracted Control Flow Machine). Simulation is currently the primary means of verifying large circuits, but the definition of a coverage measure for simulation vectors is an open problem. We define functional coverage as the amount of control behavior cover...

• Type: Journal
• Year: 1998
• Where: TC
• Authors: Dinos Moundanos, Jacob A. Abraham, Yatin Vasant Hoskote
• Keywords: Control Flow, Information Technology, TC 1998, Test Generation, Validation Coverage