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ECRTS
2008
IEEE
14 years 4 months ago
Temporal Analysis for Adapting Concurrent Applications to Embedded Systems
Embedded services and applications that interact with the real world often, over time, need to run on different kinds of hardware (low-cost microcontrollers to powerful multicore ...
Sibin Mohan, Johannes Helander
HOTI
2008
IEEE
14 years 4 months ago
Network Processing on an SPE Core in Cell Broadband Engine
Cell Broadband EngineTM is a multi-core system on a chip and is composed of a general-purpose Power Processing Element (PPE) and eight Synergistic Processing Elements (SPEs). Its ...
Yuji Kawamura, Takeshi Yamazaki, Hiroshi Kyusojin,...
ICC
2008
IEEE
141views Communications» more  ICC 2008»
14 years 4 months ago
Multilevel Structured Low-Density Parity-Check Codes
— Low-Density Parity-Check (LDPC) codes are typically characterized by a relatively high-complexity description, since a considerable amount of memory is required in order to sto...
Nicholas Bonello, Sheng Chen, Lajos Hanzo
IISWC
2008
IEEE
14 years 4 months ago
STAMP: Stanford Transactional Applications for Multi-Processing
Abstract—Transactional Memory (TM) is emerging as a promising technology to simplify parallel programming. While several TM systems have been proposed in the research literature,...
Chi Cao Minh, JaeWoong Chung, Christos Kozyrakis, ...
MICRO
2008
IEEE
138views Hardware» more  MICRO 2008»
14 years 4 months ago
Hybrid analytical modeling of pending cache hits, data prefetching, and MSHRs
As the number of transistors integrated on a chip continues to increase, a growing challenge is accurately modeling performance in the early stages of processor design. Analytical...
Xi E. Chen, Tor M. Aamodt