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CCECE
2006
IEEE
14 years 1 months ago
FPGA-Based SAT Solver
Several approaches have been proposed to accelerate the NP-complete Boolean Satisfiability problem (SAT) using reconfigurable computing. We present an FPGA based clause evaluator,...
Mona Safar, M. Watheq El-Kharashi, Ashraf Salem
ICPPW
2006
IEEE
14 years 1 months ago
Model-Based OpenMP Implementation of a 3D Facial Pose Tracking System
Abstract— Most image processing applications are characterized by computation-intensive operations, and high memory and performance requirements. Parallelized implementation on s...
Sankalita Saha, Chung-Ching Shen, Chia-Jui Hsu, Ga...
BTW
2003
Springer
110views Database» more  BTW 2003»
14 years 22 days ago
The IOP Approach to Enterprise Frameworks
Abstract: This paper introduces the Internet Operating Platform (IOP), an enterprise framework for large scale software development. In addition to obeying to important standards (...
Udo Nink, Stefan Schäfer
DFT
2002
IEEE
127views VLSI» more  DFT 2002»
14 years 14 days ago
A New Functional Fault Model for FPGA Application-Oriented Testing
1 The objective of this paper is to propose a new fault model suitable for test pattern generation for an FPGA configured to implement a given application. The paper demonstrates t...
Maurizio Rebaudengo, Matteo Sonza Reorda, Massimo ...
MICRO
1999
IEEE
102views Hardware» more  MICRO 1999»
13 years 11 months ago
Evaluation of a High Performance Code Compression Method
Compressing the instructions of an embedded program is important for cost-sensitive low-power control-oriented embedded computing. A number of compression schemes have been propos...
Charles Lefurgy, Eva Piccininni, Trevor N. Mudge