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TPDS
2002
75views more  TPDS 2002»
13 years 7 months ago
An Experimental Evaluation of I/O Optimizations on Different Applications
Many large scale applications have significant I/O requirements as well as computational and memory requirements. Unfortunately, the limited number of I/O nodes provided in a typic...
Meenakshi A. Kandaswamy, Mahmut T. Kandemir, Alok ...
PVLDB
2008
123views more  PVLDB 2008»
13 years 7 months ago
Efficient implementation of sorting on multi-core SIMD CPU architecture
Sorting a list of input numbers is one of the most fundamental problems in the field of computer science in general and high-throughput database applications in particular. Althou...
Jatin Chhugani, Anthony D. Nguyen, Victor W. Lee, ...
ICPADS
2010
IEEE
13 years 5 months ago
Data-Aware Task Scheduling on Multi-accelerator Based Platforms
To fully tap into the potential of heterogeneous machines composed of multicore processors and multiple accelerators, simple offloading approaches in which the main trunk of the ap...
Cédric Augonnet, Jérôme Clet-O...
IMC
2010
ACM
13 years 5 months ago
Revisiting the case for a minimalist approach for network flow monitoring
Network management applications require accurate estimates of a wide range of flow-level traffic metrics. Given the inadequacy of current packet-sampling-based solutions, several ...
Vyas Sekar, Michael K. Reiter, Hui Zhang
NOCS
2010
IEEE
13 years 5 months ago
Addressing Manufacturing Challenges with Cost-Efficient Fault Tolerant Routing
Abstract--The high-performance computing domain is enriching with the inclusion of Networks-on-chip (NoCs) as a key component of many-core (CMPs or MPSoCs) architectures. NoCs face...
Samuel Rodrigo, Jose Flich, Antoni Roca, Simone Me...