734 search results - page 58 / 147 » Configurable Transactional Memory |
DATE
2008
IEEE
14 years 3 months ago
2008
IEEE
Run-time reconfigurable logic is a very attractive alterative in the design of SoC. However, configuration overhead can largely decrease the system performance. In this work, we p...
FPL
2008
Springer
13 years 10 months ago
2008
Springer
In the context of FPGAs, system downgrade consists in preventing the update of the hardware configuration or in replaying an old bitstream. The objective can be to preclude a syst...
ISVLSI
2003
IEEE
14 years 2 months ago
2003
IEEE
Previous work has shown that cache line sizes impact performance differently for different desktop programs – some programs work better with small line sizes, others with larger...
DSN
2000
IEEE
14 years 1 months ago
2000
IEEE
Recent work has shown the advantages of using persistent memory for transaction processing. In particular, the Vista transaction system uses recoverable memory to avoid disk I/O, ...
IPPS
2010
IEEE
13 years 6 months ago
2010
IEEE
Abstract--Software transactional memory (STM) algorithms often rely on centralized components to achieve atomicity, isolation and consistency. In a distributed setting, centralized...