734 search results - page 99 / 147 » Configurable Transactional Memory |
DFT
2009
IEEE
14 years 3 months ago
2009
IEEE
This paper presents the first implementation of Built-In Self-Test (BIST) of Field Programmable Gate Arrays (FPGAs) using a soft core embedded processor for reconfiguration of the...
IPPS
2002
IEEE
14 years 1 months ago
2002
IEEE
Eclipse is a heterogeneous multiprocessor architecture for high-performance media processing, including highdefinition MPEG encoding/decoding. The scalable architecture framework ...
IFL
2000
Springer
14 years 12 days ago
2000
Springer
Sac is a functional array processing language particularly designed with numerical applications in mind. In this field the runtime performance of programs critically depends on the...
CAL
2002
13 years 8 months ago
2002
Embedded systems commonly execute one program for their lifetime. Designing embedded system architectures with configurable components, such that those components can be tuned to t...
IISWC
2008
IEEE
14 years 3 months ago
2008
IEEE
Commercial server applications remain memory bound on modern multiprocessor systems because of their large data footprints, frequent sharing, complex non-strided access patterns, ...